(a) Fields of the Invention
The present invention relates to transistors with nitride semiconductors which are applicable to power transistors for use in, for example, power supply circuits of consumer devices such as general-purpose inverters.
(b) Description of Related Art
In recent years, field effect transistors (FETs) made of gallium nitride (GaN)-based materials have been actively studied as high-frequency, high-power devices. Since nitride semiconductor materials such as GaN can form various types of mixed crystals in combination with aluminum nitride (AlN) and indium nitride (InN), they can form heterojunctions like conventional arsenic-based semiconductor materials such as gallium arsenide (GaAs). In particular, the heterojunction of the nitride semiconductor is characterized in that by spontaneous polarization or piezoelectric polarization, carriers with a high concentration are generated at its heterointerface even without doping. As a result of this, in the case where a FET is fabricated from the nitride semiconductor material, the fabricated FET is likely to exhibit depletion type (normally-on type) characteristics, and hence it is difficult for the FET to exhibit enhancement-type (normally-off type) characteristics. However, most devices currently used in the power electronics market are normally-off type devices, so that normally-off type GaN-based nitride semiconductor devices are strongly demanded.
In order to realize normally-off type transistors, transistors having the following structures are studied. The structures include: the structure as described in “T. Kawasaki et al., Solid State Devices and Materials 2005 tech. digest p. 206” in which a gate portion is dug to shift a threshold voltage positively; the structure as described in “M. Kuroda et al., Solid State Devices and Materials 2005 tech. digest p. 470” in which a FET is fabricated on the GaN (11-20) plane, which is a so-called non-polar plane, to prevent a polarization electric field from being generated in the crystal growth direction of the nitride semiconductor. As shown in Japanese Unexamined Patent Publication No. 2005-244072, as a potential structure for realizing the normally-off type FET, a junction field effect transistor (JFET) is proposed in which a p-type GaN layer is formed in a gate portion. In the JFET structure, a barrier layer of AlGaN is formed on a channel layer of undoped GaN, and p-type GaN is formed on the barrier layer. In this structure, decreasing the thickness of the AlGaN layer or decreasing the Al content in the AlGaN layer can provide normally-off characteristics.